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Challenge

CMOS-Quantum Circuit Optimizer

As companies push for CMOS-compatible quantum technologies, the need for efficient hardware-mapping software grows. This challenge requires you to build an automated optimization pipeline that takes high-level quantum circuits and maps them to simulated CMOS-compatible qubit layouts. You will use DeepSeek-V3, via the Marvin framework, to interpret complex gate requirements and suggest optimal routing to minimize decoherence. The entire simulation and optimization sequence will be orchestrated using Prefect, allowing for parallel execution of circuit permutations and robust observability of the optimization process.

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Challenge brief

What you are building

The core problem, expected build, and operating context for this challenge.

Build a quantum-classical hybrid optimization pipeline using DeepSeek-V3 for circuit mapping and Prefect for parallel simulation management.

Delivery guide

How work is evaluated

Evaluation

The evaluation focuses on the optimizer's ability to reduce gate depth while maintaining the logical integrity of the quantum circuit.

Datasets

Challenge datasets

Public datasets, plus the private datasets you have access to.

Learning goals

What you should walk away with

  • Master the integration of Marvin decorators to turn DeepSeek-V3 into a structured circuit transpiler

  • Deploy Prefect Work Pools to distribute quantum simulation tasks across multiple compute nodes

  • Build a cost-function evaluator that checks the gate-depth and error-rate of mapped circuits

  • Implement a Prefect flow that dynamically adjusts simulation parameters based on LLM feedback

  • Orchestrate the benchmarking of CMOS-compatible gate sets against standard superconducting qubit models

  • Utilize DeepSeek-V3's reasoning capabilities to suggest architectural improvements for CMOS quantum chips

Resources and assets

Reference links and supporting material

Dataset notes

Sample data for 1 tasks

Challenge setup

The evaluation focuses on the optimizer's ability to reduce gate depth while maintaining the logical integrity of the quantum circuit.

Challenge input

OpenQASM string

Agent execution

No agent tool is listed for this challenge.

Evaluated output

Optimized OpenQASM string + Gate Depth Integer

Evaluation checks
  • The output QASM must be valid and parseable by standard simulators.
Configured evaluation evidence
  • Depth Reduction Ratio target: 1.2
Configured runtime
  • Python execution harness

Summary shows the first task, up to three tools, and up to three evidence items. Open the technical recipe to view all configured items.

View technical recipe

Configured tools

No tool records are attached.

Evaluation contract

  • The output QASM must be valid and parseable by standard simulators.

Metrics

  • Depth Reduction Ratio ยท Target 1.2

Workflow tasks

  1. Task 1

    Input: OpenQASM string

    Output: Optimized OpenQASM string + Gate Depth Integer

    Execution harness: Python

Recipe freeze marker

No recipe freeze time is recorded.

Frequently Asked Questions about CMOS-Quantum Circuit Optimizer